The following programs were written to test the functionality of the
'Enhanced Synchronous Serial Port' (ESSP) available in some devices 
in the C2xx family. These programs were tested on TMX320LC206 running
at 40 MHz with  3.3V supply.

Most of the programs perform loopback of data for which an external
connection between DX-DR FSX-FSR and CLKX-CLKR pin may be necessary.
The received data is usually written beginning in 300h in data memory.

In almost all of the programs, the XF pin is toggled in the transmit
and receive interrupt subroutines. This feature is useful to determine
whether a program is running and also the operation of the prescalers.
Some programs require an external CLKX and FSX. In such cases, a CODEC
that is capable of providing the shift clock and frame sync (such as
TLC320AD55C ) needs to be connected to the DSP. 

For programs that check the multi-channel mode functionality, CLKX and
CLKR pins must be isolated. This is because CLKR pin is used as a frame
sync pin in multi-channel mode. This fact must be borne in mind when 
running these programs on target boards in which CLKX and CLKR  are 
connected in the PCB itself. 

All programs have been extensively commented to aid better user 
understanding.


***********************************************************************
     ESSP TEST PROGRAMS       Written by Sam Saba               7/27/98
***********************************************************************

1. ESSPB.asm	Non-stop transmit of known data in burst mode for SSP 
		with delay between xmit FIFO write.
		Internal CLKX and FSX.
		Checks SSP functionality,w/o programming ESSP registers

2. ESSPC.asm    Same as ESSPB.asm, but transmission in continuous mode  

3. EPB_XCF.asm	Burst mode, External CLX & FSX Non-stop xmit/receive
		with delay. The status of transmit & receive FIFOs can
		be checked by singlestepping thru the code.
   
4. EPB_LBK.asm  Non-stop transmit of known data in burst mode for SSP 
		with delay between xmit FIFO write. Internal CLKX and
		FSX. The digital loopback mode is enabled. This mode 
		internally connects DX-DR, FSX-FSR and CLKX-CLKR pins 
		of the C2xx device. No external loopback needed.
   
5. EPB_EBK.asm  Loop back with external pins DR-DX, burst mode, 
		internal FSX and CLKX

6. EPBXCIPF.asm	Non-stop transmit in Burst mode  for ESSP with External
		CLKX and prescaled internal FSX. Reads FIFO status into
		data memory locations 6ah-74h.
		CLXOX has no effect on CLKX or FSX rate. ('dont Care')
		FSX rate is CLKX/(2(FSXCT+1))
		OPTION 3

7. EPCXCIPF.asm Same as EPBXCIPF.asm, but transmission in continuous 
		mode
	
8. EPB_ICXF.asm Burst mode, external FSX and internal CLKX at CLXCT
                rate. Continuous xmit if FSX/FSR and DR/DX are short. 
		This is not a valid option if CLKX and FSX are not
		synchronous. i.e. the source of FSX should use CLKX 
		as its CLKX to generate FSX.CLKXOX has no effect
		OPTION 6.

9. EPC_ICXF.asm Same as EPBXCIPF.asm, but transmission in continuous
		mode. Once SSPRST is restored, the receive needs a 
		frame sync to receive and so is xmit. While continuous
		receive, if FSR goes high, no data will be loaded
		into the receive FIFO. If FSR goes low, then next
		receive, will occur, and cause receive interrupts.
		Not recommended unless CLKX is sync with FSX 

10. EPB_ICPF.asm Non-stop transmit in Burst mode  for ESSP with 
		 prescaled CLKX and prescaled internal FSX.
		 CLXOX has no effect - X! - OPTION 7 in Table A

11. EPC_ICPF.asm Same as EPB_ICPF.asm, but transmission in continuous 
		 mode  - OPTION 7 in Table B

12. EPB_ICF.asm	Non-stop transmit in Burst mode  for ESSP with 
		prescaled CLKX. FSX at Transmit FIFO rate 
		OPTION 9 in Table A. CLXOX - X!
   
13. EPC_ICF.asm Same as EPB_ICPF.asm, but transmission in continuous 
		mode.If CLKX stretches data in the FIFO to be too slow, 
		then subsequent write in FIFO will cause, the data to 
		appear continuous without new frame sync. Lower value 
		of CLKX will initiate FSX for every block of FIFO 
		write.-	OPTION 9 in Table B.

14. EPB_INC.asm Non-stop transmit in Burst mode (external loop back) 
		with inverted CLKX. That is, CLKX is inverted at pin 
		level, and reinverted at CLR level 
	
15. EPC_INC.asm	Same as EPB_INC.asm,but transmission in continuous mode

16. EPB_INF.asm Non-stop transmit in Burst mode (external loop back) 
		with inverted FSX. That is FSX is inverted at pin level,
		and reinverted at FSR level 

17. EPC_INF.asm Same as EPB_INF.asm,but transmission in continuous mode


18. EPB_MC.asm  Non-stop transmit in burst mode for 4-channel with 
		CLXCT/FSXCT programmed. This is only for transmit.
		i.e This program DOES NOT loopback serial data.
		However the CLKX and FSX rates can be checked.
 
19. EPB_MCR.asm Non-stop transmit in burst mode for 4-channel with 
		CLXCT/FSXCT programmed. Performs external loop back.
		This is for transmit/receive.   FSXOX,CLXOX have no
		effect.

20. EPB_MXR.asm Same as EPB_MCR.asm, but external CLKX is needed.
		Works only in Burst mode FSM mode bit is a don't care
		in Continuous mode, will default to Burst mode

21. EPB_SPI.asm Burst mode xmit in SPI mode using receive interrupt
                - Check FSX,CLKX,DX. CLKX low normally. CLN bit
  		will invert the CLKX, which will make the CLKX high
		in between data transmit. FSXOX,CLKXOX has no effect 
		CLN inverts the CLKX at pin level, CLKR need not
		be connected to CLKX. CLKR is internally connected
		to CLKX. Back to back to write to FIFO causes FSX 
		to occur on the LSB  of the trailing word.

22. EPB_SPI1.asm 
                Same as EPB_SPI.asm, but uses transmit interrupt
                Program works with 8-bit words also 
		FSX will occur from 15th bit to any delay specified
		before next XMIT fifo write.
		SPI mode will be valid if there is enough delay between
		successive FIFO writes. If successive writes occur at a 
		very rapid rate, then, the CLKX appears running all the
		time!. Since CLXCT value  changes the data rate, too 
		low a value will make the xmit back-to-back! i.e CLKX 
		appears	continuous.

23. EPB_SPI2.asm Same as EPB_SPI1.asm, but uses byte mode with CLKX,FSX
		 inverted.
   
24. EPC_SPI1.asm Same as EPB_SPI1.asm, but transmission in continuous 
		 mode


25. EPB_T1.asm  Checks 16-bit counter operation. - Input to counter is 
		CLKX.    Pre-scaler used as counter- Counter interrupt
		enables XMIT FIFO write. XF toggles at the XINT
		interrupt rate. Buffer at 0x300 stores the counter
		value at each interrupt.
		OPTION 13 in Table A

26. EPB_T1A.asm Same as EPB_T1.asm ,but with CLKOUT1 as i/p to the 
		counter.
    
27. EPC_T1.asm  Same as EPB_T1.asm ,but with continuous mode 


28. EPB_T2.asm  Counter i/p is CLKX = CLKOUT1/2
	        Burst mode xmit in SSP mode - Internal CLKX, Ext FSX
                Pre-scalar used as counter- Counter interrupt
		enables XMIT FIFO write
		OPTION 14
    
29. EPC_T2.asm	Same as EPB_T2.asm ,but with continuous mode 

30. EPB_T3.asm  Burst mode xmit in SSP mode - External CLKX,internal
		FSX. Pre-scalar used as counter- Counter interrupt
		enables XMIT FIFO write. XF toggles at the
                Counter rate. CNTCLK/((COUNTER+1)). Counter value 
                captured in 0x300 buffer.
		OPTION 15

31. EPC_T3.asm  Same as EPB_T2.asm ,but with continuous mode 
		Xmit interrupt reads timer value, rx interrupt
		reads FIFOs, pin loopback reads the xmit data!

32. EPB_T4.asm  Burst mode xmit in SSP mode - External CLKX,external
		FSX.
		OPTION 16

33. EPC_T4.asm	Same as EPB_T4.asm ,but with continuous mode 

		
34. EPB_T5.asm  Burst mode, External CLKX & FSX . Polls FSXST for every
		transmit. XF is toggled whenever FSXST is set. FSXST 
		gets set and cleared by W1C/R


35. EPB_T6.asm  Burst mode, E-CLKX,E-FSX CLKX at 17us!. 
		Poll DR bit with FSX pulse on DR pin, toggle xf for
		every DR change. This sets xf pulse for every
		DR transition, indicating DR works as pin read!



Note:

Treat FSX internal rate (FSXCT) as external FSX! from external
source but available  internally.		 
