PART 68010L8
 FAMILY REALCHIP
 POWER_PINS (VCC:49,14;GND:53,16)
PIN
 DTACK*       (10)       INPUT    (-0.0025,0.0025)
 BR*          (13)       INPUT    (-0.0025,0.0025)
 BGACK*       (12)       INPUT    (-0.0025,0.0025)
 IPL<2>*      (23)       INPUT    (-0.0025,0.0025)
 IPL<1>*      (24)       INPUT    (-0.0025,0.0025)
 IPL<0>*      (25)       INPUT    (-0.0025,0.0025)
 BERR*        (22)       INPUT    (-0.0025,0.0025)
 VPA*         (21)       INPUT    (-0.0025,0.0025)
 CLK          (15)       INPUT    (-0.0025,0.0025)
 D<15>        (54)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<14>        (55)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<13>        (56)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<12>        (57)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<11>        (58)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<10>        (59)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<9>         (60)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<8>         (61)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<7>         (62)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<6>         (63)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<5>         (64)       TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<4>         (1)        TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<3>         (2)        TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<2>         (3)        TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<1>         (4)        TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 D<0>         (5)        TS       (-0.02,0.02)   (5.3,-0.4)  BIDIR
 RESET*       (18)       OC       (-0.02,0.02)   (35.0,*)  BIDIR
 HALT*        (17)       OC       (-0.02,0.02)   (1.6,*)  BIDIR
 A<23>        (52)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<22>        (51)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<21>        (50)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<20>        (48)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<19>        (47)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<18>        (46)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<17>        (45)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<16>        (44)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<15>        (43)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<14>        (42)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<13>        (41)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<12>        (40)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<11>        (39)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<10>        (38)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<9>         (37)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<8>         (36)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<7>         (35)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<6>         (34)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<5>         (33)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<4>         (32)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<3>         (31)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<2>         (30)       TS       (-0.02,0.02)   (3.2,-0.4)
 A<1>         (29)       TS       (-0.02,0.02)   (3.2,-0.4)
 AS*          (6)        TS       (-0.02,0.02)   (5.3,-0.4)
 R            (9)        TS       (-0.02,0.02)   (5.3,-0.4)
 UDS*         (7)        TS       (-0.02,0.02)   (5.3,-0.4)
 LDS*         (8)        TS       (-0.02,0.02)   (5.3,-0.4)
 BG*          (11)       OUTPUT   (3.2,-0.4)
 E            (20)       OUTPUT   (5.3,-0.4)
 VMA*         (19)       TS       (-0.02,0.02)   (5.3,-0.4)
 FC<2>        (26)       TS       (-0.02,0.02)   (3.2,-0.4)
 FC<1>        (27)       TS       (-0.02,0.02)   (3.2,-0.4)
 FC<0>        (28)       TS       (-0.02,0.02)   (3.2,-0.4)
END
