# SccsId = "@(#)dense_elmnts 1.2 (ESE) 04/06/89"
name basic_node
class CONN_NODE
auto_gen  TRUE
circuit
mark	3	3	 0.0	 0.0
stick
mark	-1	3	 0.0	 0.0
layout
box	NOT	0	0	 0	 0

name terminal
class TERM_NODE
auto_gen  FALSE
circuit
mark	3	5	 0.0	 0.0
stick
mark	-1	5	 0.0	 0.0
layout
box	NOT	0	0	 0	 0

name nenh
class DEV_NODE
auto_gen  FALSE
term	g1	ps	-1	 0
term	g2	ps	 1	 0
term	d	od	 0	 1
term	s	od	 0	-1
circuit
line	3	0	 0.0	-1.0	 0.0	-0.5
line	3	0	 0.0	-0.5	-0.35	-0.5
line	3	0	-0.35	-0.5	-0.35	 0.5
line	3	0	-0.35	 0.5	 0.0	 0.5
line	3	0	 0.0	 0.5	 0.0	 1.0
line	3	0	-0.50	-0.5	-0.50	 0.5
line	3	0	-1.0	 0.0	 1.0	 0.0
stick
box	1	16	-1.0	-0.1	 1.0	 0.1
box	2	16	-0.1	-1.0	 0.1	 1.0
layout
box	ps	-14	-4	 14	 4	
box	od	-6	-16	 6	 16	
box     sn	-16	-26	 16	 26	

name penh
class DEV_NODE
auto_gen  FALSE
term	g1	ps	-1	 0
term	g2	ps	 1	 0
term	d	od	 0	 1
term	s	od	 0	-1
circuit
line	3	0	 0.0	-1.0	 0.0	-0.5
line	3	0	 0.0	 0.5	 0.0	 1.0
line	3	0	-0.50	-0.5	-0.50	 0.5
line	3	0	-1.0	 0.0	 1.0	 0.0
box	3	16	-0.35	-0.5	 0.0	 0.5
stick
box	1	16	-1.0	-0.1	 1.0	 0.1
box	2	16	-0.1	-1.0	 0.1	 1.0
box	5	4	-1.0	-1.0	 1.0	 1.0
layout
box	ps	-14	-4	 14	 4      
box	od	-6	-16	 6	 16     
box     sp	-16	-26	 16	 26     
box	nw	-30	-40	 30	 40	


name con_n+od
class CONN_NODE
auto_gen  TRUE
circuit
mark	3	3	 0.0	 0.0
stick
box	0	16	-0.2	-0.2	 0.2	 0.2
box	6	16	-0.4	-0.4	 0.4	 0.4
layout
box	con	-5	-5	 5	 5	
box	od	-10	-10	 10	 10	
box	in	-10	-10	 10	 10     
box	sn	-20	-20	 20	 20	

name con_p+od
class CONN_NODE
auto_gen  TRUE
circuit
mark	3	3	 0.0	 0.0
stick
box	0	16	-0.2	-0.2	 0.2	 0.2
box	6	16	-0.4	-0.4	 0.4	 0.4
box	5	 4	-0.4	-0.4	 0.4	 0.4
layout
box	cop	-5	-5	 5	 5      
box	od	-10	-10	 10	 10     
box	in	-10	-10	 10	 10     
box	sp	-20	-20	 20	 20     
box	nw	-34	-34	 34	 34	

name nwell_c
class CONN_NODE
auto_gen  FALSE
circuit
mark	5	5	 0.0	 0.0
stick
box	0	16	-0.2	-0.2	 0.2	 0.2
box	4	16	-0.4	-0.4	 0.4	 0.4
box	5	4	-0.4	-0.4	 0.4	 0.4
layout
box     con     -5      -5       5       5
box     in      -10     -10      10      10
box     od      -18     -18      18      18
box     sn      -8      -8       8       8
box     sp      -28     -28      28      -8
box     sp      -28       8      28      28
box     sp      -28     -28      -8      28
box     sp        8     -28      28      28
box     nw      -42     -42      42      42

name substr_c
class CONN_NODE
auto_gen  FALSE
circuit
mark	2	5	 0.0	 0.0
stick
box	0	16	-0.2	-0.2	 0.2	 0.2
box	4	16	-0.4	-0.4	 0.4	 0.4
layout
box     cop     -5      -5       5       5
box     in      -10     -10      10      10
box     od      -18     -18      18      18
box     sp      -8      -8       8       8
box     sn      -28     -28      28      -8
box     sn      -28       8      28      28
box     sn      -28     -28      -8      28
box     sn        8     -28      28      28

name con_ps
class CONN_NODE
auto_gen  TRUE
circuit
mark	3	3	 0.0	 0.0
stick
box	0	16	-0.2	-0.2	 0.2	 0.2
box	1	16	-0.4	-0.4	 0.4	 0.4
box	4	16	-0.3	-0.3	 0.3	 0.3
layout
box	cps	-5	-5	 5	 5      
box	in	-10	-10	 10	 10     
box	ps	-10	-10	 10	 10	

name in_ins
class CONN_NODE
auto_gen  TRUE
circuit
mark    3       3        0.0     0.0
stick
box     0       16      -0.2    -0.2     0.2     0.2
box     4       16      -0.4    -0.4     0.4     0.4
box     3       16      -0.3    -0.3     0.3     0.3
layout
box     cos     -5      -5       5       5
box     in     -10     -10      10      10
box     ins    -10     -10      10      10

name con_ps_w
class CONN_NODE
auto_gen  TRUE
circuit
mark	3	3	 0.0	 0.0
stick
box	0	16	-0.2	-0.2	 0.2	 0.2
box	1	16	-0.4	-0.4	 0.4	 0.4
box	4	16	-0.3	-0.3	 0.3	 0.3
layout
box	cps	-5	-5	 5	 5
box	in	-10	-10	 10	 10
box	ps	-10	-10	 10	 10
box	nw	-10	-10	 10	 10

name nwell
class WELL_NODE
auto_gen  FALSE
circuit
box	5	0	 0.0	 0.0	 0.0	 0.0
stick
box	5	0	 0.0	 0.0	 0.0	 0.0
layout
box	nw	0	0	 0	 0

name sub_cell
class MODEL_NODE
auto_gen  FALSE
circuit
box	4	16	 0.0	 0.0	 0.0	 0.0
box	1	0	 0.0	 0.0	 0.0	 0.0
stick
box	7	0	 0.0	 0.0	 0.0	 0.0
layout
box	bb	0	0	 0	 0

