require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_I915_DRM_H_)) {
    eval 'sub _I915_DRM_H_ () {1;}' unless defined(&_I915_DRM_H_);
    require 'drm.ph';
    eval 'sub I915_NR_TEX_REGIONS () {255;}' unless defined(&I915_NR_TEX_REGIONS);
    eval 'sub I915_LOG_MIN_TEX_REGION_SIZE () {14;}' unless defined(&I915_LOG_MIN_TEX_REGION_SIZE);
    eval("sub I915_INIT_DMA () { 0x01; }") unless defined(&I915_INIT_DMA);
    eval("sub I915_CLEANUP_DMA () { 0x02; }") unless defined(&I915_CLEANUP_DMA);
    eval("sub I915_RESUME_DMA () { 0x03; }") unless defined(&I915_RESUME_DMA);
    eval("sub I915_INIT_DMA2 () { 0x04; }") unless defined(&I915_INIT_DMA2);
    eval 'sub DRM_I915_FENCE_CLASS_ACCEL () {0;}' unless defined(&DRM_I915_FENCE_CLASS_ACCEL);
    eval 'sub DRM_I915_FENCE_TYPE_RW () {2;}' unless defined(&DRM_I915_FENCE_TYPE_RW);
    eval 'sub DRM_I915_FENCE_FLAG_FLUSHED () {0x1000000;}' unless defined(&DRM_I915_FENCE_FLAG_FLUSHED);
    eval 'sub I915_BOX_RING_EMPTY () {0x1;}' unless defined(&I915_BOX_RING_EMPTY);
    eval 'sub I915_BOX_FLIP () {0x2;}' unless defined(&I915_BOX_FLIP);
    eval 'sub I915_BOX_WAIT () {0x4;}' unless defined(&I915_BOX_WAIT);
    eval 'sub I915_BOX_TEXTURE_LOAD () {0x8;}' unless defined(&I915_BOX_TEXTURE_LOAD);
    eval 'sub I915_BOX_LOST_CONTEXT () {0x10;}' unless defined(&I915_BOX_LOST_CONTEXT);
    eval 'sub DRM_I915_INIT () {0x;}' unless defined(&DRM_I915_INIT);
    eval 'sub DRM_I915_FLUSH () {0x1;}' unless defined(&DRM_I915_FLUSH);
    eval 'sub DRM_I915_FLIP () {0x2;}' unless defined(&DRM_I915_FLIP);
    eval 'sub DRM_I915_BATCHBUFFER () {0x3;}' unless defined(&DRM_I915_BATCHBUFFER);
    eval 'sub DRM_I915_IRQ_EMIT () {0x4;}' unless defined(&DRM_I915_IRQ_EMIT);
    eval 'sub DRM_I915_IRQ_WAIT () {0x5;}' unless defined(&DRM_I915_IRQ_WAIT);
    eval 'sub DRM_I915_GETPARAM () {0x6;}' unless defined(&DRM_I915_GETPARAM);
    eval 'sub DRM_I915_SETPARAM () {0x7;}' unless defined(&DRM_I915_SETPARAM);
    eval 'sub DRM_I915_ALLOC () {0x8;}' unless defined(&DRM_I915_ALLOC);
    eval 'sub DRM_I915_FREE () {0x9;}' unless defined(&DRM_I915_FREE);
    eval 'sub DRM_I915_INIT_HEAP () {0xa;}' unless defined(&DRM_I915_INIT_HEAP);
    eval 'sub DRM_I915_CMDBUFFER () {0xb;}' unless defined(&DRM_I915_CMDBUFFER);
    eval 'sub DRM_I915_DESTROY_HEAP () {0xc;}' unless defined(&DRM_I915_DESTROY_HEAP);
    eval 'sub DRM_I915_SET_VBLANK_PIPE () {0xd;}' unless defined(&DRM_I915_SET_VBLANK_PIPE);
    eval 'sub DRM_I915_GET_VBLANK_PIPE () {0xe;}' unless defined(&DRM_I915_GET_VBLANK_PIPE);
    eval 'sub DRM_I915_VBLANK_SWAP () {0xf;}' unless defined(&DRM_I915_VBLANK_SWAP);
    eval 'sub DRM_I915_MMIO () {0x10;}' unless defined(&DRM_I915_MMIO);
    eval 'sub DRM_I915_HWS_ADDR () {0x11;}' unless defined(&DRM_I915_HWS_ADDR);
    eval 'sub DRM_I915_EXECBUFFER () {0x12;}' unless defined(&DRM_I915_EXECBUFFER);
    eval 'sub DRM_IOCTL_I915_INIT () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_INIT,  &drm_i915_init_t);}' unless defined(&DRM_IOCTL_I915_INIT);
    eval 'sub DRM_IOCTL_I915_FLUSH () { &DRM_IO (  &DRM_COMMAND_BASE +  &DRM_I915_FLUSH);}' unless defined(&DRM_IOCTL_I915_FLUSH);
    eval 'sub DRM_IOCTL_I915_FLIP () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_FLIP,  &drm_i915_flip_t);}' unless defined(&DRM_IOCTL_I915_FLIP);
    eval 'sub DRM_IOCTL_I915_BATCHBUFFER () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_BATCHBUFFER,  &drm_i915_batchbuffer_t);}' unless defined(&DRM_IOCTL_I915_BATCHBUFFER);
    eval 'sub DRM_IOCTL_I915_IRQ_EMIT () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_I915_IRQ_EMIT,  &drm_i915_irq_emit_t);}' unless defined(&DRM_IOCTL_I915_IRQ_EMIT);
    eval 'sub DRM_IOCTL_I915_IRQ_WAIT () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_IRQ_WAIT,  &drm_i915_irq_wait_t);}' unless defined(&DRM_IOCTL_I915_IRQ_WAIT);
    eval 'sub DRM_IOCTL_I915_GETPARAM () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_I915_GETPARAM,  &drm_i915_getparam_t);}' unless defined(&DRM_IOCTL_I915_GETPARAM);
    eval 'sub DRM_IOCTL_I915_SETPARAM () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_SETPARAM,  &drm_i915_setparam_t);}' unless defined(&DRM_IOCTL_I915_SETPARAM);
    eval 'sub DRM_IOCTL_I915_ALLOC () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_I915_ALLOC,  &drm_i915_mem_alloc_t);}' unless defined(&DRM_IOCTL_I915_ALLOC);
    eval 'sub DRM_IOCTL_I915_FREE () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_FREE,  &drm_i915_mem_free_t);}' unless defined(&DRM_IOCTL_I915_FREE);
    eval 'sub DRM_IOCTL_I915_INIT_HEAP () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_INIT_HEAP,  &drm_i915_mem_init_heap_t);}' unless defined(&DRM_IOCTL_I915_INIT_HEAP);
    eval 'sub DRM_IOCTL_I915_CMDBUFFER () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_CMDBUFFER,  &drm_i915_cmdbuffer_t);}' unless defined(&DRM_IOCTL_I915_CMDBUFFER);
    eval 'sub DRM_IOCTL_I915_DESTROY_HEAP () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_DESTROY_HEAP,  &drm_i915_mem_destroy_heap_t);}' unless defined(&DRM_IOCTL_I915_DESTROY_HEAP);
    eval 'sub DRM_IOCTL_I915_SET_VBLANK_PIPE () { &DRM_IOW(  &DRM_COMMAND_BASE +  &DRM_I915_SET_VBLANK_PIPE,  &drm_i915_vblank_pipe_t);}' unless defined(&DRM_IOCTL_I915_SET_VBLANK_PIPE);
    eval 'sub DRM_IOCTL_I915_GET_VBLANK_PIPE () { &DRM_IOR(  &DRM_COMMAND_BASE +  &DRM_I915_GET_VBLANK_PIPE,  &drm_i915_vblank_pipe_t);}' unless defined(&DRM_IOCTL_I915_GET_VBLANK_PIPE);
    eval 'sub DRM_IOCTL_I915_VBLANK_SWAP () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_I915_VBLANK_SWAP,  &drm_i915_vblank_swap_t);}' unless defined(&DRM_IOCTL_I915_VBLANK_SWAP);
    eval 'sub DRM_IOCTL_I915_MMIO () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_I915_MMIO,  &drm_i915_mmio);}' unless defined(&DRM_IOCTL_I915_MMIO);
    eval 'sub DRM_IOCTL_I915_EXECBUFFER () { &DRM_IOWR( &DRM_COMMAND_BASE +  &DRM_I915_EXECBUFFER, \'struct drm_i915_execbuffer\');}' unless defined(&DRM_IOCTL_I915_EXECBUFFER);
    eval 'sub I915_PARAM_IRQ_ACTIVE () {1;}' unless defined(&I915_PARAM_IRQ_ACTIVE);
    eval 'sub I915_PARAM_ALLOW_BATCHBUFFER () {2;}' unless defined(&I915_PARAM_ALLOW_BATCHBUFFER);
    eval 'sub I915_PARAM_LAST_DISPATCH () {3;}' unless defined(&I915_PARAM_LAST_DISPATCH);
    eval 'sub I915_PARAM_CHIPSET_ID () {4;}' unless defined(&I915_PARAM_CHIPSET_ID);
    eval 'sub I915_SETPARAM_USE_MI_BATCHBUFFER_START () {1;}' unless defined(&I915_SETPARAM_USE_MI_BATCHBUFFER_START);
    eval 'sub I915_SETPARAM_TEX_LRU_LOG_GRANULARITY () {2;}' unless defined(&I915_SETPARAM_TEX_LRU_LOG_GRANULARITY);
    eval 'sub I915_SETPARAM_ALLOW_BATCHBUFFER () {3;}' unless defined(&I915_SETPARAM_ALLOW_BATCHBUFFER);
    eval 'sub I915_MEM_REGION_AGP () {1;}' unless defined(&I915_MEM_REGION_AGP);
    eval 'sub DRM_I915_VBLANK_PIPE_A () {1;}' unless defined(&DRM_I915_VBLANK_PIPE_A);
    eval 'sub DRM_I915_VBLANK_PIPE_B () {2;}' unless defined(&DRM_I915_VBLANK_PIPE_B);
    eval 'sub I915_MMIO_READ () {0;}' unless defined(&I915_MMIO_READ);
    eval 'sub I915_MMIO_WRITE () {1;}' unless defined(&I915_MMIO_WRITE);
    eval 'sub I915_MMIO_MAY_READ () {0x1;}' unless defined(&I915_MMIO_MAY_READ);
    eval 'sub I915_MMIO_MAY_WRITE () {0x2;}' unless defined(&I915_MMIO_MAY_WRITE);
    eval 'sub MMIO_REGS_IA_PRIMATIVES_COUNT () {0;}' unless defined(&MMIO_REGS_IA_PRIMATIVES_COUNT);
    eval 'sub MMIO_REGS_IA_VERTICES_COUNT () {1;}' unless defined(&MMIO_REGS_IA_VERTICES_COUNT);
    eval 'sub MMIO_REGS_VS_INVOCATION_COUNT () {2;}' unless defined(&MMIO_REGS_VS_INVOCATION_COUNT);
    eval 'sub MMIO_REGS_GS_PRIMITIVES_COUNT () {3;}' unless defined(&MMIO_REGS_GS_PRIMITIVES_COUNT);
    eval 'sub MMIO_REGS_GS_INVOCATION_COUNT () {4;}' unless defined(&MMIO_REGS_GS_INVOCATION_COUNT);
    eval 'sub MMIO_REGS_CL_PRIMITIVES_COUNT () {5;}' unless defined(&MMIO_REGS_CL_PRIMITIVES_COUNT);
    eval 'sub MMIO_REGS_CL_INVOCATION_COUNT () {6;}' unless defined(&MMIO_REGS_CL_INVOCATION_COUNT);
    eval 'sub MMIO_REGS_PS_INVOCATION_COUNT () {7;}' unless defined(&MMIO_REGS_PS_INVOCATION_COUNT);
    eval 'sub MMIO_REGS_PS_DEPTH_COUNT () {8;}' unless defined(&MMIO_REGS_PS_DEPTH_COUNT);
    eval 'sub I915_RELOC_HEADER () {4;}' unless defined(&I915_RELOC_HEADER);
    eval 'sub I915_RELOC_TYPE_0 () {0;}' unless defined(&I915_RELOC_TYPE_0);
    eval 'sub I915_RELOC0_STRIDE () {4;}' unless defined(&I915_RELOC0_STRIDE);
    eval 'sub I915_RELOC_TYPE_1 () {1;}' unless defined(&I915_RELOC_TYPE_1);
    eval 'sub I915_RELOC1_STRIDE () {4;}' unless defined(&I915_RELOC1_STRIDE);
}
1;
