\noindent
{\bf
Stellar GS1000
}

\noindent
{\bf
Vector Register, Shared-Memory, Parallel Architecture - graphics supercomputer
}

\vspace{.1in}
\noindent
{\bf Architecture:}
Custom-designed Application-Specific Integrated Circuits
(ASICs) are used both for processor and graphics hardware. There
are 11 distinct modules with approximately 2 million
1.5 $\mu$ CMOS gates
in 61 physical components.  Silicon is fabricated by LSI Logic
foundry in California, and boards are assembled by TI in Tennessee.

\vspace{.1in}
\noindent
A central feature of this computer is its DataPath architecture
which acts as a switch and multiplexor/demultiplexor rather than
a conventional bus. The main processing unit, the SPMP
(Synchronous-Pipeline Multiprocessor) is a custom multi-stream
architecture providing up to four instruction-execution
streams.  Streams share functional units, on a pipelined
basis, and each has its own large register files with dedicated
integer, scalar floating-point, and vector floating-point
registers. The clock cycle time is 50 nsec.
The multi-stream processor (MSP) is implemented as a single unit
thus enabling 100 nsec synchronization through concurrency
registers within the MSP.
The four streams of the MSP are interleaved onto a single 12-stage
MSP pipeline. In the steady state, an
instruction finishes on every cycle, for an instruction throughput of
20 mips. Note that each stream is completing an instruction every 200
nsec because of the length of the pipes.  The use of a technique
called packetization, whereby a single stream can execute 2
non-conflicting instructions simultaneously, can increase the
performance to 25 mips.

\vspace{.1in}
\noindent
In addition to the multi-stream processor, there is
a special-purpose functional unit for scalar and vector
floating-point instructions using Weitek 2264/2265 chips.

\vspace{.1in}
\noindent
Minimum main memory is 16 Mbytes expandable to 128 Mbytes with
a data transfer rate of 320 Mbytes/sec and a memory bandwidth for
graphical operations of 640 Mbytes/sec (possible because pixel data
is accessed in 128 rather than 64 byte blocks). Memory cycle time is
200 nsec.
All four streams share a single
1 Mbyte static RAM cache, thus avoiding the coherency problems of
multiple cache machines.
The cache line is 64 bytes, and one line can be accessed every clock
cycle for a transfer rate of 1.28 Gbyte/sec.

\vspace{.1in}
\noindent
The Main Data Path also manages DMA I/O, using four I/O channels each with a
capacity of 16 Mbytes/sec.  Multiple controllers and disk
striping are supported.

\vspace{.1in}
\noindent
A PC-AT compatible integral Service Processor, based on a 80386
microprocessor, controls booting and console functions in addition
to managing scan-path and remote diagnostic systems built into
each circuit. PC-AT software can be run on the Service Processor
under a window of the display.

\vspace{.1in}
\noindent
One feature of this computer is the tight integration of
general-purpose and graphical computation. Central to this is the
Rendering Processor, a custom-built special-purpose SIMD engine
which executes 320 million graphics-specific operations per
second and implements high-level machine instructions for
high-performance rendering of complex shaded and solid
images, including lighting, Gouraud and Phong shading, depth-cuing,
and anti-aliasing. Using virtual pixel maps, images are rendered into
virtual memory which allows n-way buffering and does not restrict
image size to that of the display devices. Images are transferred
from main memory to the frame buffer at 640 Mbytes/sec.
A 16- or 32-bit frame buffer
is available which allows both hardware
double-buffering and stereo
viewing. An enhanced X-window system and the Programmer's
Hierarchical Interactive Graphics System (PHIGS) are supported.
Stellar is assisting in the development of PHIGS+ and will support
these extensions to PHIGS in hardware as well as software.
Main display device is a 1280 x 1024 19" color monitor running
at 74 Hz.

\vspace{.1in}
\noindent
{\bf Configuration:}
The GS1000 can be used as a stand-alone machine. However,
TCP/IP, NFS, and Ethernet are supported, and support is planned
for ISO/OSI protocols, Pronet-80, and FDDI (Fiber Distributed Data
Interface) when available or defined. 80 Mbyte hard disks, a
380 Mbyte 5 1/4 inch disk drive (with
double density option at 766 Mbytes), a 600 Mbyte 8" disk drive,
a 120 Mbyte cartridge tape drive, and a 1/2 inch tape drive are
supported.
There is support for up to three
VME buses, and a PC-AT compatible bus.

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\noindent
{\bf Software:}
The operating system, called Stellix, is based on Unix System V
Release 3.1, with enhancements for multiprocessing, I/O, Berkeley
4.3, etc.

\vspace{.1in}
\noindent
{\bf Languages available:}
The Fortran-77 (with extensions) and C compilers automatically
detect parallelism and use vector processing. The Fortran
compiler has most of the popular VMS extensions.
An execution
profiler and a multi-stream symbolic debugger are available.
A concurrency library is available for manual control of program
concurrency.
A Stellar Assembler language is available.
Ada and LISP compilers are under development.

\vspace{.1in}
\noindent
{\bf Applications:}
Major applications targeted include computer-aided design and
engineering, molecular modelling, computer animation, image
processing, geophysical modelling, simulation and analysis, fluid
dynamics, aerodynamics, astrophysics, and meteorology.
Stellar has reached agreements for the porting of over 45 third-party
software applications, and
discussions are ongoing with over 70 application software vendors.

\vspace{.1in}
\noindent
{\bf Performance:}
Peak rates of
20-25 mips and up to 40 Mflops in double precision
(64-bit words). Graphics maximum rate of 600,000 3D vectors/sec
and 150,000 Gouraud shaded polygons/sec.
It is planned to offer over 100 mips processing by 1990.

\vspace{.1in}
\noindent
{\bf Status:}
The cost of a configuration which includes the three processing units,
16 Mbytes of memory, a
380 Mbyte disk, cartridge and high-density floppy drives, PC/AT
controller, a 1280 x 1024 monitor, and operating system
is \$104,900.  The parallelizing Fortran compiler costs \$4K.

\noindent
The first shipment was to the NIH
in March 1988.
European shipments commenced in June 1988.

\vspace{.1in}
\noindent
{\bf Contact:}
\begin {flushleft}
Stellar Computer Inc\\
85 Wells Ave.\\
Newton, MA 02159\\
617-964-1000\\

\vspace{.1in}
\noindent
Chairman and CEO:  Dr. John William Poduska, Sr.\\
President and COO: Arthur Carr\\
VP Sales:          Wallace E. Smith\\
Technical Support: Timothy Stewart\\
VP International Sales:   Dan Murray\\

\vspace{.1in}
\noindent
Ian Gilbert\\
UK Marketing and Sales\\
Little Eastwick\\
Lower Farm Road\\
Effingham, Surrey KT24 5JJ\\
England\\
0372-58707\\

\vspace{.1in}
\noindent
Hans Holler\\
Germany Marketing and Sales\\
Hagenauer Strasse 42\\
6200 Wiesbaden\\
WEST GERMANY\\
49-61-22037 \\

\vspace{.1in}
\noindent
Makota Yamada\\
Japan Sales and Marketing\\
Kihoh Bldg. 1F\\
2-2 Koji-machi\\
Chiyoda-ku\\
Tokyo, JAPAN\\
81 3 237 0131\\

\vspace{.1in}
\noindent
European marketing divided into three regions centered on UK, France, and Germany.\\
\end {flushleft}