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{\bf
BBN Butterfly GP1000 and TC2000 Parallel Processor
}

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{\bf
Parallel Butterfly Network Architecture
}


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{\bf Architecture:}
The Butterfly GP1000 is a tightly coupled, shared
memory multiprocessor housing up to 256 processor boards, each
with an MC68020 microprocessor and an IEEE-complying MC68882
floating-point
coprocessor.  Every processor board includes 4 Mbytes of globally
shared memory.  Any processor can access any memory location
through the Butterfly switch, a fast, modular, multi-stage
interconnect.  Processors also have direct access to their own  4
Mbyte share of the global memory pool.  Providing true parallel
access to memory, the Butterfly performs up to 256 simultaneous
reads or writes and automatically resolves contention for memory.


\begin {tabbing}
aaa\=bbb\=ccc\=  \kill
Other architectural features include:\\
\>   Multiple instruction, multiple data (MIMD) architecture.\\
\>   Up to 600 mips of processing power in 2.5 mip increments.\\
\>   All processors have access to as much as 1024 Mbytes\\
\>\> (one Gbyte) of main memory.\\
\>   Memory bandwidth up to 1024 Mbytes/sec (one Gbyte/sec).\\
\>   Memory access time is typically less than 1 microsecond,\\
\>\>        4 microseconds worst case (without contention).\\
\> Distributed I/O system supports RS-232, RS-449, Ethernet, Multibus,\\
\>\>        and VME bus.\\
\> Field expandable in single processor increments.\\
\end {tabbing}

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{\bf Configuration:}

The GP1000 is a standalone system supporting a full range of
peripherals including 500 Mbyte and 850 Mbyte disk drives; 1/4"
cartridge and 1/2" reel-to-reel tape drives; a flexible terminal
control system; and an Ethernet interface.
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{\bf Software:}
Mach 1000, the GP1000
operating system, is based on Berkeley 4.3bsd UNIX, with
extensions for parallel processing.
The GP1000 supports C, Fortran 77, Common Lisp, and Scheme (a
Lisp dialect). Ada is being developed. All languages are extended
naturally to support parallel structures. A rich,
graphically-oriented debugging environment is provided.

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{\bf Status:}
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Prices vary from \$95,000 to \$3,500,000 depending on
size and peripherals.

The BBN TC2000
incorporates Motorola's 88000 microprocessor.
The multiprocessing
architecture allows field-expansion from eight to 504 processors,
with corresponding increases in memory, memory-access bandwidth,
and I/O capabilities.

MAXIMUM  SYSTEM PERFORMANCE (504 processors)
\begin{verbatim}
          Integer                    9,576 Dhrystone MIPS
          Whetstone                  6,552 Whetstones
          Floating Point            10,080 MFLOPS
          Memory                    16,096 MBytes
          I/O Bandwidth              2,560 MBytes/sec
\end{verbatim}

TC2000 system supports two operating systems concurrently.  At the
same time as some processors are running the pSOS+m real-time
executive for time-critical applications, others can be using the
nX operating system (based on UNIX 4.3 BSD) for either
analysis or time-shared program development.

A major feature unique to the TC2000 system is its software-
controlled clustering capability.  Processors can be assigned to
groups or clusters, which are then designated for either nX or
pSOS+m operation.  Different sections of an application can be run
concurrently on each one.  In addition, data can be shared within
and between clusters, so a TC2000 system can integrate various
segments of a complex application traditionally dispersed among a
number of loosely-coupled computers.  Processor allocation is
dynamic, meaning that resources can be reallocated during an
actual run.
 
To reduce the time and cost of applications development, the
TC2000 system includes the only graphical development tools
specifically designed for a multiprocessor environment.  Based on
the X Window System standard, the Xtra (X Tools for
Runtime Analysis) environment makes it easier for programmers to
handle the complexities inherent in multiprocessor programming.
Included within the Xtra environment is the TotalView source-
level, multi-processing debugger and  the Gist graphics-
oriented performance analyzer.  Optimized Ada, Fortran-77 and C
compilers are also available for the TC2000 system.
 
Pricing for the TC2000 system begins at \$350,000 for a base model
with 152 Dhrystone MIPS and 160 MFLOPS.  BBN Advanced Computers
will sell the TC2000 system in technical markets through its
direct sales force.

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{\bf Contact:}\\
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\noindent
Gary Schmidt\\
Bolt, Beranek and Newman Advanced Computers Inc.\\
10 Fawcett Street\\
Cambridge, MA 02238\\
617-873-2756\\

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\noindent
Gerry O'Neill\\
BBN Inc.\\
Heriot-Watt Research Park\\
Riccarton\\
Edinburgh EH14 4AP\\
Scotland\\
031-449-5488\\
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