What is this?
--------------

This package contains an (extensive) patch against the XFree86-3.1.1-1
sources (as found on disc 4 of Infomagic's developer's resource of March 95).

Its purpose is to support W32p boards with a 16-bit ICS5341 GenDAC. This
card _should_ have the same capabilities as, say an S3-864 card. Only... the
XFree86 W32 server doesn't support _any_ special DAC features.

This server has been tested on a W32p PCI card with ICS5341 gendac at pixel
clock speeds up to 150 MHz (the specs say that 135 MHz is maximum, but
that's what specs are for...).

If you have such a W32p card, you can then use modes like 1024x768 @ 75 Hz,
1280x1024 @ 75 Hz (110 MHz pixel clock!), and, if you feel lucky, you could
always enter the line "dacspeed 150" and try that. This would give you
1600x1200 @ 60 Hz non-interlaced. No guarantees however...


How to use it?
---------------

Basically, replace the old server with this one (or better: back up the old
one ;-), and start it up.

If you don't change the XF86Config file, the server will behave as before
(except for a few minor things that have changed to the log messages you get
at startup). If it reports that it detected an ICS5341 GENDAC, you're lucky!

You can then use the two extra options:

    ramdac "ics5341"
    clockchip "ics5341"
    
in the device section of XF86Config to enable the code for the GenDAC.

The extra functionality will NOT be used unless you explicitely enable it
using these two options! (that's to remain compatible with the default
server).

Once this has been enabled, the server will report for each mode which uses
a pixel clock higher that 67.5 MHz that it will use pixel multiplexing. 

Please note that interlacing cannot be combined with pixel multiplexing yet
(a bug, no doubt)


What has changed?
------------------

The patches have changed the following things (comparing with the original server):

 - those silly "hibit_high is not supported for this card" messages have
   gone (that was a small bug).
   
 - you can now set the ramdac type with a "ramdac att20c490" line, as in
   many other X-servers.
   valid ramdac types are:
   
         "normal"
         "att20c47xa"
         "sc1502x"
         "att20c497"
         "att20c490"
         "att20c493"
         "att20c491"
         "att20c492"
         "ics5341"
         "gendac"
        
 - all the other ramdac types were already detected by the server, except
   for the gendacs and the ics5341 (also a GenDAC). These are now also
   auto-detected.
   
 - the detection of the ET4000 chipset version was completely wrong. It
   detected an ET4000, but the version (a, b, c, d, ...) was wrong. W32p rev
   d chips were detected as being a rev c, etc. This has been corrected (it
   now complies with the Tseng W32p data book errata from 3/94)
   
 - the maximum allowable pixel clock was fixed at 86 MHz (data book specs).
   Now you can change that with e.g. "dacspeed 90". This was needed for the
   Gendac's, since the ICS5341 can go up to 135 MHz (and it still works
   perfectly at 150 MHz = 1600x1200 @ 60 Hz).
   
 - for the ICS5341 GenDAC, pixel multiplexing is supported. This allows the
   ET4000 to stay below its limit of 86 MHz, while the 16-bit interface can
   pump pixels to the DAC at over 135 MHz.

 - the S3 clockchip code was restructured a little to allow for the ET4000
   GenDAC to use it.
  
 - Also, the standard W32 server cleared a bit in CRTC index 0x34 that
   disabled PCI burst mode on PCI cards. This caused mouse cursor garbage
   (until you did a VT switch). This has been changed now, and it shouldn't 
   affect any other cards (this bit has no function on non-PCI cards)
  
   
Things NOT changed (yet?), and thnings not correct (yet):

  - still no 16/24 Bpp modes available, and that's a real shame (especially
    for those 16-bit DAC's)
    
  - When using pixel multiplexing, interlacing is not good. This should
    work, since I've seen it work on a commercial X-server (it also did 16
    and 24 Bpp for Tseng cards...)

  - when you increase the dacspeed to 150 Mhz (for the 1600x1200 @ 60 HZ
    mode), there is a bug in the S3 clockchip code that produces a wrong
    frequency at 150 MHz. If you use 149.5 MHz, it works.


This directory contains the following files:

 - XF86_W32_gendac  : the W32 server
 - xfree86_et4000W32_gendac.diff  : the patches against the standard server sources
 - README   :  you're reading it...

