#
# 68k_test_11
#
# eleventh test file for the 68k core testing program
#
# tests Quick instructions
#

# $Id$

#
# NOTE: Someone plays fast and loose with flags...
#

# Test MOVEQ instruction (MOVEQ)

# test MOVEQ d0
start moveq d0, take 1
set mem 0x002000 = 0x7000
set pc 0x002000
set reg d0 = 0x55aa55aa
set cycles 4
run
check pc 0x002002
check cycles 0
check reg d0 = 0x00000000
done

# test MOVEQ d0
start moveq d0, take 2
set mem 0x002000 = 0x70ff
set pc 0x002000
set reg d0 = 0x55aa55aa
set cycles 4
run
check pc 0x002002
check cycles 0
check reg d0 = 0xffffffff
done

# test MOVEQ d0
start moveq d0, take 3
set mem 0x002000 = 0x7055
set pc 0x002000
set reg d0 = 0x55aa55aa
set cycles 4
run
check pc 0x002002
check cycles 0
check reg d0 = 0x00000055
done

# test MOVEQ d0
start moveq d0, take 4
set mem 0x002000 = 0x70aa
set pc 0x002000
set reg d0 = 0x55aa55aa
set cycles 4
run
check pc 0x002002
check cycles 0
check reg d0 = 0xffffffaa
done

#
# Test SUBQ instruction (SUBQ.B)
#

# test SUBQ.B d0
start subq.b d0, take 1
set mem 0x002000 = 0x5100
set pc 0x002000
set cycles 4
set reg d0 = 0x00000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x000000f8
check flags 0x0019
done

# test SUBQ.B d0
start subq.b d0, take 2
set mem 0x002000 = 0x5300
set pc 0x002000
set cycles 4
set reg d0 = 0x00000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x000000ff
check flags 0x0019
done

# test SUBQ.B d0
start subq.b d0, take 3
set mem 0x002000 = 0x5300
set pc 0x002000
set cycles 4
set reg d0 = 0x00000001
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x00000000
check flags 0x0004
done

# test SUBQ.B d0
start subq.b d0, take 4
set mem 0x002000 = 0x5300
set pc 0x002000
set cycles 4
set reg d0 = 0x00000080
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x0000007f
check flags 0x0002
done

#
# Test SUBQ instruction (SUBQ.W Dn)
#

# test SUBQ.W d0
start subq.w d0, take 1
set mem 0x002000 = 0x5140
set pc 0x002000
set cycles 4
set reg d0 = 0x00000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x0000fff8
check flags 0x0019
done

# test SUBQ.W d0
start subq.w d0, take 2
set mem 0x002000 = 0x5340
set pc 0x002000
set cycles 4
set reg d0 = 0x00000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x0000ffff
check flags 0x0019
done

# test SUBQ.W d0
start subq.w d0, take 3
set mem 0x002000 = 0x5340
set pc 0x002000
set cycles 4
set reg d0 = 0x00000001
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x00000000
check flags 0x0004
done

# test SUBQ.W d0
start subq.w d0, take 4
set mem 0x002000 = 0x5340
set pc 0x002000
set cycles 4
set reg d0 = 0x00008000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x00007fff
check flags 0x0002
done

#
# Test SUBQ instruction (SUBQ.W An)
#

# test SUBQ.W a0
start subq.w a0, take 1
set mem 0x002000 = 0x5148
set pc 0x002000
set cycles 8
set reg a0 = 0x00000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg a0 = 0xfffffff8
check flags 0x0000
done

# test SUBQ.W a0
start subq.w a0, take 2
set mem 0x002000 = 0x5348
set pc 0x002000
set cycles 8
set reg a0 = 0x00000000
set flags 0x001f
run
check pc 0x002002
check cycles 0
check reg a0 = 0xffffffff
check flags 0x001f
done

# test SUBQ.W a0
start subq.w a0, take 3
set mem 0x002000 = 0x5348
set pc 0x002000
set cycles 8
set reg a0 = 0x00000001
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg a0 = 0x00000000
check flags 0x0000
done

# test SUBQ.W a0
start subq.w a0, take 4
set mem 0x002000 = 0x5348
set pc 0x002000
set cycles 8
set reg a0 = 0x80000000
set flags 0x001f
run
check pc 0x002002
check cycles 0
check reg a0 = 0x7fffffff
check flags 0x001f
done

#
# Test SUBQ instruction (SUBQ.L Dn)
#

# test SUBQ.L d0
start subq.l d0, take 1
set mem 0x002000 = 0x5180
set pc 0x002000
set cycles 8
set reg d0 = 0x00000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0xfffffff8
check flags 0x0019
done

# test SUBQ.L d0
start subq.l d0, take 2
set mem 0x002000 = 0x5380
set pc 0x002000
set cycles 8
set reg d0 = 0x00000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0xffffffff
check flags 0x0019
done

# test SUBQ.L d0
start subq.l d0, take 3
set mem 0x002000 = 0x5380
set pc 0x002000
set cycles 8
set reg d0 = 0x00000001
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x00000000
check flags 0x0004
done

# test SUBQ.L d0
start subq.l d0, take 4
set mem 0x002000 = 0x5380
set pc 0x002000
set cycles 8
set reg d0 = 0x80000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg d0 = 0x7fffffff
check flags 0x0002
done

#
# Test SUBQ instruction (SUBQ.L An)
#

# test SUBQ.L a0
start subq.l a0, take 1
set mem 0x002000 = 0x5188
set pc 0x002000
set cycles 8
set reg a0 = 0x00000000
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg a0 = 0xfffffff8
check flags 0x0000
done

# test SUBQ.L a0
start subq.l a0, take 2
set mem 0x002000 = 0x5388
set pc 0x002000
set cycles 8
set reg a0 = 0x00000000
set flags 0x001f
run
check pc 0x002002
check cycles 0
check reg a0 = 0xffffffff
check flags 0x001f
done

# test SUBQ.L a0
start subq.l a0, take 3
set mem 0x002000 = 0x5388
set pc 0x002000
set cycles 8
set reg a0 = 0x00000001
set flags 0x0000
run
check pc 0x002002
check cycles 0
check reg a0 = 0x00000000
check flags 0x0000
done

# test SUBQ.L a0
start subq.l a0, take 4
set mem 0x002000 = 0x5388
set pc 0x002000
set cycles 8
set reg a0 = 0x80000000
set flags 0x001f
run
check pc 0x002002
check cycles 0
check reg a0 = 0x7fffffff
check flags 0x001f
done

#
# Test ADDQ instruction (ADDQ.B)
#

# test ADDQ.B d0
start addq.b d0, take 1
set mem 0x002000 = 0x5200
set pc 0x002000
set reg d0 = 0x00000000
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x00000001
check flags 0x0000
done

# test ADDQ.B d0
start addq.b d0, take 2
set mem 0x002000 = 0x5200
set pc 0x002000
set reg d0 = 0x00ffffff
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x00ffff00
check flags 0x0015
done

# test ADDQ.B d0
start addq.b d0, take 3
set mem 0x002000 = 0x5200
set pc 0x002000
set reg d0 = 0x5500007f
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x55000080
check flags 0x000a
done

#
# Test ADDQ instruction (ADDQ.W Dn)
#

# test ADDQ.W d0
start addq.w d0, take 1
set mem 0x002000 = 0x5240
set pc 0x002000
set reg d0 = 0x00000000
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x00000001
check flags 0x0000
done

# test ADDQ.W d0
start addq.w d0, take 2
set mem 0x002000 = 0x5240
set pc 0x002000
set reg d0 = 0x0055ffff
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x00550000
check flags 0x0015
done

# test ADDQ.W d0
start addq.w d0, take 3
set mem 0x002000 = 0x5240
set pc 0x002000
set reg d0 = 0x03307fff
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x03308000
check flags 0x000a
done

#
# Test ADDQ instruction (ADDQ.W An)
#

# test ADDQ.W a0
start addq.w a0, take 1
set mem 0x002000 = 0x5248
set pc 0x002000
set reg a0 = 0x00000000
set cycles 4
set flags 0x0018
run
check cycles 0
check pc 0x002002
check reg a0 = 0x00000001
check flags 0x0018
done

# test ADDQ.W a0
start addq.w a0, take 2
set mem 0x002000 = 0x5248
set pc 0x002000
set reg a0 = 0xffffffff
set cycles 4
set flags 0x0008
run
check cycles 0
check pc 0x002002
check reg a0 = 0x00000000
check flags 0x0008
done

# test ADDQ.W a0
start addq.w a0, take 3
set mem 0x002000 = 0x5248
set pc 0x002000
set reg a0 = 0x7fffffff
set cycles 4
set flags 0x001f
run
check cycles 0
check pc 0x002002
check reg a0 = 0x80000000
check flags 0x001f
done

#
# Test ADDQ instruction (ADDQ.L Dn)
#

# test ADDQ.L d0
start addq.l d0, take 1
set mem 0x002000 = 0x5280
set pc 0x002000
set reg d0 = 0x00000000
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x00000001
check flags 0x0000
done

# test ADDQ.L d0
start addq.l d0, take 2
set mem 0x002000 = 0x5280
set pc 0x002000
set reg d0 = 0xffffffff
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x00000000
check flags 0x0015
done

# test ADDQ.L d0
start addq.l d0, take 3
set mem 0x002000 = 0x5280
set pc 0x002000
set reg d0 = 0x7fffffff
set cycles 4
set flags 0x0000
run
check cycles 0
check pc 0x002002
check reg d0 = 0x80000000
check flags 0x000a
done

#
# Test ADDQ instruction (ADDQ.L An)
#

# test ADDQ.L a0
start addq.l a0, take 1
set mem 0x002000 = 0x5288
set pc 0x002000
set reg a0 = 0x00000000
set cycles 4
set flags 0x0018
run
check cycles 0
check pc 0x002002
check reg a0 = 0x00000001
check flags 0x0018
done

# test ADDQ.L a0
start addq.l a0, take 2
set mem 0x002000 = 0x5288
set pc 0x002000
set reg a0 = 0xffffffff
set cycles 4
set flags 0x0008
run
check cycles 0
check pc 0x002002
check reg a0 = 0x00000000
check flags 0x0008
done

# test ADDQ.L a0
start addq.l a0, take 3
set mem 0x002000 = 0x5288
set pc 0x002000
set reg a0 = 0x7fffffff
set cycles 4
set flags 0x001f
run
check cycles 0
check pc 0x002002
check reg a0 = 0x80000000
check flags 0x001f
done

#
# $Log$
#
